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Dual triggered gate generator
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Manual or pulse triggered START (NIM, TTL or ECL)
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Monostable (re-trigger) or bistable operation
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NIM, TTL and ECL output pulses from 50 ns to 10 s
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Manual or pulse triggered RESET
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(NIM, TTL and ECL) END-MARKER pulse
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VETO input
The CAEN Mod. DT993 Dual Timer is a desktop module housing two identical triggered pulse generators. The module produces NIM/TTL (NIM/TTL selection is performed via an on-board switch) and ECL pulses whose width ranges from 50 ns to 10 s when triggered. Output pulses are provided normal and negated. Timers can be re-triggered with the pulse end marker signal, a short pulse occurring at the end of each output pulse. The coarse adjustment of the output width is provided via a 9-position rotary switch, the fine adjustment can be performed via either 15 turn dial handle (with lock) or by providing an external voltage. The trigger START can be provided via either an external signal (NIM, TTL or ECL) or manually via a front panel switch. The module features also VETO and RESET input signals. RESET is also available on a front panel switch. The DT993 is equipped with LEMO 00 connectors for NIM/TTL signals and male pin couples for ECL signals.
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Image
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Name
|
Package
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No. Of Sections
|
Function
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Inputs per Section
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Outputs per Section
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Output Width/Delay
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In Conn.
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Out Conn.
|
|
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V993C |
VME 2U |
2 |
Timer |
1 NIM/TTL + 1 ECL |
2+/1 NIM/TTL+ 1 ECL |
50 ns ÷ 10 s |
LEMO / Pin couple |
LEMO / Pin couple |
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|
DT993 |
Desktop |
2 |
Timer |
1 NIM/TTL + 1 ECL |
2+/1 NIM/TTL+ 1 ECL |
50 ns ÷ 10 s |
LEMO / Pin couple |
LEMO / Pin couple |
|
|
V972 |
VME |
1 |
Delay |
1 Analog |
1 Analog |
2.6 ÷ 34.1 ns |
LEMO |
LEMO |
|
|
N93B |
NIM |
2 |
Timer |
1 NIM + 1 ECL |
2+/1 NIM+ 1 ECL |
50 ns ÷ 10 s |
LEMO / Pin couple |
LEMO / Pin couple |
Technical Specifications
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Packaging |
Desktop module; 262 W x 66.2 H x 171.6 L mm3 (without connectors) alloy box |
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Output / Section |
OUT: NIM/TTL signal with a Fan-Out of 2, ECL signal /OUT: negated NIM/TTL signal, ECL signal |
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Output width |
50 ns ÷ 10 s (NIM, TTL and ECL) |
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WSET (width set voltage) |
0 ÷ 5 V d.c. |
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START/OUT delay |
< 25 ns |
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RESET delay |
~30 ns: the timing cycle stops ~30 ns after the RESET pulse is sent |
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Rise/Fall Time |
< 2 ns |
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Thermal stability |
-60 ppm/°C |
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