Up to 128 Channel Latching Scaler
250 MHz maximum counting frequency
32 bit channel depth
Multichannel scaler operation with programmable dwell time from 1 µsec to ~ 1 hour
4 k x 32 bit multievent buffer memory
Trigger time tag
VME Block Transfer support
Free Trial version download
FW1495SC is a FPGA firmware for CAEN V1495 model that allows to use the Mod. V1495 as a Multievent latching scaler housing up to 128 independent counting channels (this maximum number of channels is achieved if the V1495 is expanded with two A395A boards). Each channel has 32 bit counting depth and accepts LVDS/ECL/PECL inputs; the maximum input frequency is 250 MHz (if A395D Mezzanine is used), 200 MHz for Motherboard and other Mezzanines.
The board has a FIFO memory that stores the values of the counter, latched “On the fly” at the trigger arrival, while the counting goes on. The Trigger signal can be provided by an external NIM/TTL signal or by a VME request. It is also possible to generate a periodical Trigger signal by means of an internal programmable timer. The counters can be also read out “On the fly” real time via VME. A programmable General Input signal (NIM /TTL) can be programmed as CLEAR, TEST or VETO (in common for all channels).
Free downloadable FW1495SC Trial version.
The User can download the Trial Version for evaluation
The Trial version has a DAQ time frame limitation: every 30 min the user have to restart (power off/power on) the board
To get full functionality the user should purchase a License and register it
The procedure is automatic and can be completed on our web site
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Description
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Software
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Features
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Related Modules
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DPP-PHA |
Digital Pulse Processing for the Pulse Height Analysis |
MC2Analyzer, Compass |
ICH (Independent channels), WV (Waveforms), TS (Timestamp), PHA (Pulse Height Analysis), TDC (Time to Digital Converter) except 724 |
724, 725, 730, 740, 745 Digitizer families |
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FW2495SC |
128 Channels Latching Scaler for V2495 and DT5495 |
N.A. |
64-128 ch. (32-bit depth) 250 MHZ scaler |
V2945, DT5495 |
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FW1495SC |
128 Channels latching Scaler Firmware for V1495 |
N.A. |
64-128 ch. (32-bit depth) 200 MHZ scaler |
V1495 |
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DPP-SUP |
Super Licence for CAEN Digitizers |
N.A. |
DPP-SUP License covers different CAEN DPP firmware on a single digitizer |
725, 730, 740, 745, 2740, 2745, 2730, 2751 Digitizer families |
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DPP-QDC |
Digital Pulse Processing for Charge Integration in High Density Systems |
Compass |
ICH (Independent channels), WV (Waveforms), TS (Timestamp), QDC (Charge to Digital Converter) |
740D Digitizer familiy |
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DPP-DAW |
Digital Pulse Processing with Dynamic Acquisition Window |
DPP-DAW Demo Software |
ICH (Independent channels), WV (Waveforms), TS (Timestamp), DAW (Dynamic Acquisition Window) |
724, 725, 730 Digitizer families |
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DPP-ZLEPLUS |
Digital Pulse Processing for the Zero Length Encoding |
DPP-ZLEplus Demo Software |
WV (Waveforms), TS (Timestamp), ZS (Zero Suppression) |
725, 730, 740, 745, 751 Digitizer families |
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DPP-PSD |
Digital Pulse Processing for Charge Integration and Pulse Shape Discrimination |
Compass |
ICH (Independent channels), WV (Waveforms), TS (Timestamp), TDC (Time to Digital Converter), QDC (Charge to Digital Converter), CFD (Constant Fraction Discriminator), PSD (Pulse Shape Discrimination) |
720, 725, 730, 751, 740, 745 Digitizer families |