8 independent input channels, 500 MS/s 14-bit, with individual DC offset adjustment
Front panel readout via USB-3.0 or 1Gb Ethernet
Based on Kintex UltraScale+ FPGA
Ready-to-Use Firmware solutions to get time-stamped waveforms and physical quantities
Triggered and Streaming Readout modes supported
SDK provided for Open FPGA and Open Arm customizations
Sci-Compiler, WaveDump2, and CoMPASS fully supported
The CAEN Mod. DTL2730 is a 8 input channel desktop digitizer designed for high-speed acquisition and real-time digital pulse processing of signals from radiation detectors. Part of the DTL series, it combines compactness and performance, making it ideal for small experimental setups and laboratory environments.
Each input channel features a 14-bit, 500 MS/s ADC capable of digitizing analog signals from detectors such as silicon sensors, HPGe, scintillation detectors with PMTs or SiPMs, and wire chambers. The data are processed in real time by a Kintex UltraScale+ FPGA, where several firmware options can be loaded to suit specific experimental configurations. It covers a range of applications such as nuclear and particle physics, high-timing-resolution measurements, Fast Neutron Spectroscopy, and Homeland Security.
Data acquisition is managed through trigger generation and the definition of a Region of Interest (ROI) in samples or time. Trigger sources can be local (self-trigger), external, or software-controlled. Once acquired, the waveforms are processed in the FPGA, stored in high-speed memory with timestamp and trigger ID, and transferred via fast communication interfaces for further analysis.
The DTL2730 supports multiple acquisition modes to balance throughput, latency, and data efficiency:
Triggered mode: All channels acquire simultaneously upon a global trigger generated by a central logic unit that processes local discriminators. External or software triggers can also serve as global sources. Optional zero-suppression can be applied to reduce data volume by removing non-significant samples and reduce the readout payload.
Streaming readout mode: Each channel autonomously identifies its ROI using the self-trigger mechanism, acquiring data independently of the other channels. This mode includes automatic zero suppression (non-triggered channels are not acquired), maximizes acquisition rates, and is ideal for applications requiring real-time parameter extraction. In addition, correlation logics can be configured to validate event acquisition upon coincidences or anticoincidences between local and external triggers.
The DTL2730 can operate using both pre-configured firmware developed by CAEN and custom user-generated firmware, offering flexibility for a wide range of applications. CAEN provides ready-to-use firmware solutions optimized for specific acquisition and processing needs:
Scope Firmware: Based on full waveform recording in triggered acquisition mode. A zero suppression function is available to reduce unnecessary data readout.
DPP FirmwareCOMING SOON: Special algorithms onboard making processing on the acquired waves to extract physical quantities, usually time and energy.
For users requiring custom acquisition and processing, the Open FPGA architecture enables firmware customization through SCI-Compiler. This graphical tool allows users to create personalized firmware solutions without HDL skills. In addition, Sci-Compiler automatically generates drivers and libraries and provides graphical utilities for developing custom DAQ software.
The Linux-based Arm processor embedded in the onboard CPU makes it possible to run automated user routines. Multi-board synchronization can be implemented via backplane or front panel easy-cabling options. Multiple communication interfaces offer flexible readout options: USB 3.0 type-C and 1 Gigabit Ethernet.
|
Image
|
Name
|
Package
|
No. of Channels
|
Max Sampling Rate (MS/s)
|
Bandwidth (MHz)
|
Full Scale Range (V)
|
Resolution (bits)
|
Board Memory (Samples/ch)
|
Analog Input Connectors
|
CAEN firmware
|
Open FPGA
|
|
|
New DTL2730 |
Desktop |
8 |
500 |
TBD |
TBD |
14 |
TBD |
MCX |
DPP-PHA(cs), DPP-PSD(cs), D-SCOPE(cs) |
YES |
|
|
VX2730 |
VME64X |
32 |
500 |
250 |
[0.2 ÷ 4] |
14 |
84 M |
MCX |
DPP-PHA, DPP-PSD, D-SCOPE<sup>(cs)</sup> |
YES |
|
|
V2730B |
VME64 |
16 |
500 |
250 |
[0.2 ÷ 4] |
14 |
MCX |
84 M |
DPP-PHA, DPP-PSD, D-SCOPE(cs) |
YES |
|
|
DT2730 |
Desktop |
32 / 16 |
500 |
250 |
[0.2 ÷ 4] |
14 |
MCX |
84 M |
DPP-PHA, DPP-PSD, D-SCOPE |
YES |