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Individual Gate input per channel
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0 ÷ 400 pC input range
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Full 12-bit resolution
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100 fC LSB
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5.7 µs / 32 ch conversion time
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32 event buffer memory
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600 ns fast clear time
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Zero and overflow suppression for each channel
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±0.1% integral non linearity
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±1.5% differential non linearity
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BLT32/MBLT64/CBLT32/CBLT64 data transfer
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Multicast commands
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Live insertion
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Libraries, Demos (C and LabView) and Software tools for Windows and Linux
The Model V862 is a 1-unit wide VME 6U module housing 32 Charge-to-Digital Conversion channels with current integrating negative inputs. Each channel has an independent gate input (GATE i) logically ANDed with a COMMON GATE input; the input charge on the i-th channel is converted to a voltage level by a QAC (Charge to Amplitude Conversion) section when both the GATE i and COMMON GATE signal are active. Input range is 0 ÷ 400 pC.
The integral non linearity is ±0.1% of full scale range (FSR), measured from 2% to 97% of FSR; the differential non linearity is ±1.5% of FSR, measured from 3% to 100% of FSR.
The ADCs use a sliding scale technique to reduce the differential non-linearity.
The outputs of the QAC sections are multiplexed and subsequently converted by two fast 12-bit ADCs (5.7 µs for 32 channels).
The Mod. V862 offers a 32 event buffer memory; programmable zero suppression and trigger counter complete the features of the unit. The module works in A24/A32 mode. The data transfer occurs in D16, D32, BLT32, MBLT64 or CBLT32/CBLT64 mode. The unit also supports the Multicast commands.
The board has a special circuitry that allows it to be removed from and inserted in a powered crate without switching the crate off.
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Compare
|
Image
|
Name
|
Package
|
No. of Channels
|
Resolution (bits)
|
Conversion Time (µs)
|
LSB (fC)
|
Full Scale Range (pC)
|
Gate Width (µs)
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Fast Clear (µs)
|
Connectors
|
Features
|
|
|
V862 |
VME |
32 |
12 |
5.7 |
100 |
400 |
0.05(1) |
0.6 |
Robinson Nugent Flat |
individual gate |
|
|
V792N |
VME |
16 |
12 |
2.8 |
100 |
400 |
0.05(1) |
0.6 |
LEMO |
- |
|
|
V965 |
VME |
16 |
12 (15 dyn.) |
5.7 |
25 / 200 |
100 / 900 |
0.05(1) |
0.6 |
LEMO |
dual range |
|
|
V965A |
VME |
8 |
12 (15 dyn.) |
2.8 |
25 / 200 |
100 / 900 |
0.05(1) |
0.6 |
LEMO |
dual range |
|
|
V792 |
VME |
32 |
12 |
5.7 |
100 |
400 |
0.05(1) |
0.6 |
Std. Flat |
- |
Technical Specifications
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Packaging |
6U-high, 1U-wide VME unit (version AA requires the V430 backplane) |
|
Input signals |
32 channels, 50 Ω impedance, negative polarity, DC coupling |
|
Individual gates |
32 differential ECL signals |
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Full scale |
400 pC |
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Resolution |
12 bit |
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Gain |
100 fC/count |
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Max. Tolerated positive voltage input |
15 mV |
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Reflections |
< 5% (with 2 ns fall time input pulses) |
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RMS Noise |
0.5 counts typical |
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Input offset |
±2 mV |
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Integral non linearity |
±0.1% of FSR (=3840 counts) |
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Interchannel gain uniformity |
±4% |
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Interchannel Isolation |
> 60 dB |
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Power rejection |
0.002 count/mV (+5V); 0.01 count/mV (-5V) |
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Fast clear time |
600 ns |
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Common Gate timing |
The Common Gate signal must precede the analog input by > 15 ns |
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Individual Gate timing |
the Individual Gate signal must precede the analog input by > 8 ns |
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Conversion time |
5.7 µs for all channels |
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Zero suppression |
Threshold values programmable in:
|
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COMMON GATE input |
input signal, common to all channels, acting as the temporal window within which the individually gated inputs are integrated. |
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Control inputs |
Active-high, differential ECL input signals:
|
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Control outputs |
Differential ECL output signals:
|
|
VME interface |
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