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V965A

8 Channel Dual Range Multievent QDC

Datasheet

Home Modular Pulse Processing ElectronicsAnalogQDC V965A

Photo of V965A
  • Two simultaneous ranges: 0 ÷ 900 pC / 0÷100 pC

  • 12 bit resolution with 15 bit dynamics

  • 25 fC LSB on low range, 200 fC LSB on high range

  • 2.8 µs / 8 ch conversion time

  • 600 ns fast clear time

  • Zero and overflow suppression for each channel

  • ±0.1 % Integral non linearity

  • ±1.5 % Differential non linearity

  • 32 event buffer memory

  • BLT32/MBLT64/CBLT32/CBLT64 data transfer

  • Multicast commands

  • Live insertion

  • Libraries, Demos (C and LabView) and Software tools for Windows and Linux

The Mod. V965A is a 1-unit wide VME 6U module housing 8 Charge-to-Digital Conversion channels with current integrating negative inputs (50 Ω impedance). For each channel, the input charge is converted to a voltage level by a QAC (Charge to Amplitude Conversion) section. Each QAC output is then converted by two ADCs in parallel; one ADC is preceded by a x1 gain stage, the other by a x8 gain stage: a dual input range is then featured: 0 ÷ 900 pC (200 fC LSB) and 0 ÷ 100 pC (25 fC LSB); this allows to avoid saturation with big charge pulses while increasing resolution with small ones.
The outputs of the QAC sections are multiplexed and subsequently converted by two fast 12-bit ADCs. The ADCs use a sliding scale technique to improve the differential non-linearity. Programmable zero suppression, multi-event buffer memory, trigger counter and test features complete the flexibility of the unit.
The module works in A24/A32 addressing mode; the data transfer occurs in D16/D32/BLT32/MBLT64. The module also supports the chained block transfer (CBLT32/CBLT64) and the multicast commands.
The board supports the live insertion that allows inserting or removing it into the crate without switching it off.


Ordering Options

Code Description
WV965AXBAAAA

V965A – 8 Channel Dual Range Multievent Charge ADC (No JAUX, No 12V DCDC, live ins)

RoHS

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    Image
    Name
    Package
    No. of Channels
    Resolution (bits)
    Conversion Time (µs)
    LSB (fC)
    Full Scale Range (pC)
    Gate Width (µs)
    Fast Clear (µs)
    Connectors
    Features
    V862

    V862

    VME

    32

    12

    5.7

    100

    400

    0.05(1)

    0.6

    Robinson Nugent Flat

    individual gate

    V792N

    V792N

    VME

    16

    12

    2.8

    100

    400

    0.05(1)

    0.6

    LEMO

    -

    V965

    V965

    VME

    16

    12 (15 dyn.)

    5.7

    25 / 200

    100 / 900

    0.05(1)

    0.6

    LEMO

    dual range

    V965A

    V965A

    VME

    8

    12 (15 dyn.)

    2.8

    25 / 200

    100 / 900

    0.05(1)

    0.6

    LEMO

    dual range

    V792

    V792

    VME

    32

    12

    5.7

    100

    400

    0.05(1)

    0.6

    Std. Flat

    -

    Technical Specifications

    Close

    Packaging

    1-unit wide 6U VME module

    Inputs

    8 channels, 50 Ohm impedance, negative polarity, DC coupling

    Input range

    Dual range: 0 ÷ 900 pC / 0÷100 pC

    Resolution

    12 bit (15 bit dynamics)

    Gain

    High range: 200 fC/count; Low range: 25 fC/count

    Max. tolerated positive voltage input

    15 mV

    Reflections

    < 5% with 2 ns fall time input signals

    Input offset

    ±2 mV

    RMS Noise

    0.5 counts typical

    Integral non linearity

    0.1% of FSR (=3840 counts)
    from 5% to 95% of FSR

    Interchannel gain uniformity

    ±4%

    Interchannel Isolation

    > 60 dB

    Power rejection

    • 0.002 count/mV (+5V); 0.01 count/mV (-5V)
    • 0.0046 count/mV (+12V); 0.0012 count/mV (-12V)

    Fast clear time

    600 ns

    Gate timing

    the Gate signal must precede the analog input by > 15 ns

    Conversion time

    5.7 µs for all channels

    Zero suppression

    Threshold values programmable in:

    • 16 ADC counts steps over the entire FSR
    • 2 ADC counts steps over 1/8 of FSR

    Control inputs

    NIM input signals:

    • GATE: temporal window for current integration
    • RST: resets QAC sections, MEB status and control registers
    • VETO: inhibits the conversion of the QAC signals
    • FCLR: FAST CLEAR of QAC sections

    Control outputs

    NIM output signals:

    • DRDY: indicates the presence of data
    • BUSY: board full, resetting, converting or in MEMORY TEST mode

    VME interface

    • A24/A32

    • Geographical Addressing

    • Multicast commands

    • D16/D32,BLT32/MBLT64,CBLT32/CBLT64

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