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Three independent sections with 4 standard NIM inputs each
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AND, OR, MAJORITY function selectable for each section
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One auxiliary NIM output per section whose width is equal to the coincidence duration
The Coincidence / Logic / Trigger Units family provides flexible tools for building trigger and logic architectures in nuclear and particle physics experiments. These modules enable the implementation of coincidence, majority, AND/OR logic, fan-in/fan-out distribution, and signal translation functions while maintaining precise timing and low propagation delay.
Designed for both fixed-function and programmable use cases, the family includes compact NIM and VME modules as well as fully configurable FPGA-based platforms. They allow users to combine and process detector signals, generate triggers, and implement complex logic chains with support for multiple logic standards and configurable output widths. With modular architectures and scalable channel counts, these units can be used from simple coincidence setups to advanced multi-detector trigger systems.
Coincidence, majority, AND/OR logic and fan-in/fan-out capabilities
Support for NIM, TTL, ECL and mixed-signal environments
Adjustable output widths, veto inputs and low propagation delay
Programmable FPGA-based platforms for custom trigger and logic implementation

Three independent sections with 4 standard NIM inputs each
AND, OR, MAJORITY function selectable for each section
One auxiliary NIM output per section whose width is equal to the coincidence duration

Handy Desktop form factor
Wide range of user-selectable functionalities: logic functions, counting, timing, digital pulse generator
4 independent sections, each with:
6 NIM/TTL/ANALOG input

Handy Desktop form factor
Wide range of user-selectable functionalities: logic functions, counting, timing, digital pulse generator
4 independent sections, each with:
6 NIM/TTL/ANALOG input

User Programmable FPGA
Compact Desktop form factor
Up to 162 inputs, up to 130 outputs

Double-width NIM unit
Wide range of user-selectable functionalities: logic functions, counting, timing, digital pulse generator.
4 independent sections, each with:
6 NIM/TTL/ANALOG input

4 identical independent sections
Two inputs per section
130 MHz Max input frequency

24 DC-coupled Std. NIM inputs
50 MHz maximum input frequency
Majority level settable via front panel trimmer

Four independent sections with four channels each
TTL and NIM inputs automatically detected
NIM/TTL selectable output level

Double-width NIM unit
Wide range of user-selectable functionalities: logic functions, counting, timing, digital pulse generator.
4 independent sections, each with:
6 NIM/TTL/ANALOG input

User customisable FPGA Unit
LVDS/ECL/PECL inputs (differential)
64 inputs, expandable to 162 (with 32 outputs)

2 independent OR sections, 12 inputs each
1 GATE signal per section
Cascadeable sections
Image |
Name
|
Package |
Function |
Inputs per Section |
Outputs per Section |
I/O Delay (ns) |
Input Bandwidth (MHz) |
Majority |
Strobe/ Veto |
Connectors |
No. of Sections | |
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N405 |
NIM |
Logic Unit |
4 NIM |
2+/1 NIM, NIM Linear |
< 14 |
100 |
Yes |
yes |
LEMO |
3 | |
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New DT1081B |
Desktop |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 | |
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Coming Soon DT1082 |
Desktop |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 | |
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DT5495 |
Desktop |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 | |
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Coming Soon N1082 |
NIM |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 | |
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N455 |
NIM |
OR / AND |
2 NIM |
3+/1 NIM, 1 NIM Overlap |
< 16 |
130 |
No |
Yes |
LEMO |
4 | |
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V976 |
VME |
Logic Unit |
4 NIM/TTL |
4 NIM/TTL |
< 9 |
150 |
Yes |
No |
LEMO |
4 | |
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N1081B |
NIM |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 | |
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V2495 |
VME |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 | |
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N113 |
NIM |
OR |
12 NIM |
2 NIM |
< 10 |
130 |
No |
Yes |
LEMO |
2 |