Three independent sections with 4 standard NIM inputs each
AND, OR, MAJORITY function selectable for each section
One auxiliary NIM output per section whose width is equal to the coincidence duration
NIM shaped outputs with Fan Out of two
One negated NIM shaped output per section
One VETO input per section
Front panel trimmer for output width adjustment on each section
The Mod. N405 is a one unit wide NIM module housing three independent sections that can be used either as logic unit or majority. The two modes are selectable via internal DIP switches.
Each section accepts 4 input signals, a VETO input and provides 4 outputs (2 normal and 1 complementary, shaped, plus 1 linear). The linear output provides a signal whose width is equal to the time during which the input signals satisfy the conditions programmed via the front panel lever switches. The shaped output widths can be set via front panel trimmers in the range 6 ns to 800 ns.
LOGIC UNIT MODE
The input signals can be disabled by means of a front panel lever switch. Each section can be programmed to perform either the AND or the OR functions via front panel switches. When only one input signal is enabled the section acts as a logic FAN-OUT independently from the selected mode.
MAJORITY MODE
The front panel enable/disable lever switches are used to set the majority level. The AND/OR lever switch must be set in the AND position.
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Image
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Name
|
Package
|
Function
|
Inputs per Section
|
Outputs per Section
|
I/O Delay (ns)
|
Input Bandwidth (MHz)
|
Majority
|
Strobe/ Veto
|
Connectors
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No. of Sections
|
|
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N405 |
NIM |
Logic Unit |
4 NIM |
2+/1 NIM, NIM Linear |
< 14 |
100 |
Yes |
yes |
LEMO |
3 |
|
|
New DT1081B |
Desktop |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
Coming Soon DT1082 |
Desktop |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
DT5495 |
Desktop |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 |
|
|
Coming Soon N1082 |
NIM |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
N455 |
NIM |
OR / AND |
2 NIM |
3+/1 NIM, 1 NIM Overlap |
< 16 |
130 |
No |
Yes |
LEMO |
4 |
|
|
V976 |
VME |
Logic Unit |
4 NIM/TTL |
4 NIM/TTL |
< 9 |
150 |
Yes |
No |
LEMO |
4 |
|
|
N1081B |
NIM |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
V2495 |
VME |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 |
|
|
N113 |
NIM |
OR |
12 NIM |
2 NIM |
< 10 |
130 |
No |
Yes |
LEMO |
2 |
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Packaging |
One unit wide NIM module |
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IN |
|
|
VETO |
|
|
OUT and /OUT |
|
|
LIN |
Std. NIM level on 50 Ohm impedance. Rise/Falltime: 2 ns (10% to 90%). |
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AND/OR logic unit mode |
|
|
MAJORITY logic unit mode |
If “n” are the connected input signals (1 < or = n < or = 4) it is possible to set any majority level “m” with 1 < or = m < or = n |