FERS-5200 Boards

Read Out Systems

Photo of FERS-5200 Boards

FERS-5200 is a Front-End Readout System designed to read out large arrays of detectors, such as SiPMs, multi-anode PMTs, Silicon Strip detectors, Wire Chambers, GEM, Gas Tubes and others. FERS is a highly-scalable distributed platform. Each unit is a small card which houses 64 or 128 channels and includes Front End electronics, A/D converters, trigger logic, synchronization, local memory and readout interface.

FERS was designed keeping flexibility in mind: a single user-interface and readout infrastructure has been designed to support and perform a wide range of front-end tasks suitable for a large variety of detector types. In most cases, the front-end is based on ASIC chips. This design is perfect for large detector arrays, combining high density, cost-effective integration of multi-channel readout electronics with a small footprint and low power draw.  The Front End ASIC can implement an analog chain made of preamplifier, shaper, peak sensing and discriminator: this is for example the case of the model A5202, based on the Citiroc-1A chip produced by Weeroc for SiPM readout. In other cases, the ASIC implements a a fully digital chain, like the CERN picoTDC mounted on the A5203.

All FERS units feature USB2.0 and Ethernet 10/100T connectivity for standalone use and the Optical link to run the CAEN proprietary TDlink protocol for automatic synchronization, slow control and high-throughput data readout of multiple units. Moreover, general LEMO I/Os are available to perform programmable functionalities, depending on the particular application of the FERS unit.

A wide range of adapters and cables has also been specifically designed for FERS-5200 boards, in order to provide versatility of choice and the ability to remotely operate the detectors, a complete list is available here.

  • Platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Modular strategy: tree network made of different kind of frontend cards ( A520x FERS units- 64/128 channels) + DT5215 Concentrator Board or DT5216 Concentrator Board

  • Scalability: from a single standalone FERS units for R&D phase, to several thousands of channels with Concentrator Board

  • Easy-synch: up to 128 FERS units can be easily managed and synchronized by a single DT5215 Concentrator Board, thanks to the optical TDlink protocol

  • Distributed geometry: optical link allows to distribute the FERS units over a large detector surface/volume

  • Flexibility: FERS units are tailored to specific detectors and applications

  • Compact size: high-channel density FERS units are very efficient in terms of detector connectivity and footprint

  • Janus software for board and DAQ control

  • Form Factor: FERS unit available in boxed version for desktop use or naked for integration into mechanical frames

FERS-5200 Boards Models

DT5203

DT5203

  • 64-ch TDC unit for high-resolution timing applications housing the CERN picoTDC

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Timing resolution: LSB = 3.125 ps, RMS typ. ∼ 7 ps
DT5205
Coming Soon

DT5205

  • 64-channel readout with Weeroc Psiroc ASIC

  • Triggering down to 0.5 fC for sub-20 pF detectors

  • Dual-gain charge measurement and ToT output
A5205
Coming Soon

A5205

  • 64-channel readout with Weeroc Psiroc ASIC

  • Triggering down to 0.5 fC for sub-20 pF detectors

  • Dual-gain charge measurement and ToT output
DT5202

DT5202

  • 64-ch frontend unit for SiPM readout housing two Weeroc Citiroc-1A ASICs

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Onboard A7585D SiPM power supply
A5203

A5203

  • 64/128-ch TDC unit for high-resolution timing applications housing the CERN picoTDC

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Timing resolution: LSB = 3.125 ps, RMS typ. ∼ 7 ps
A5202

A5202

  • 64-ch frontend unit for SiPM readout applications housing two Weeroc Citiroc-1A ASICs

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Onboard A7585D SiPM power supply for sensors biasing
A5204
Coming Soon

A5204

  • 64-ch frontend unit for SiPM readout and high resolution timing applications housing a Weeroc Radioroc ASIC and a CERN picoTDC chip

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Onboard A7585D SiPM power supply for sensors biasing
DT5204
Coming Soon

DT5204

  • 64-ch frontend unit for SiPM readout and high resolution timing applications housing a Weeroc Radioroc ASIC and a CERN picoTDC chip

  • Part of FERS-5200, the CAEN platform for the readout of large arrays of detectors (SiPM, MA-PMTs, Gas Tubes, Si detectors, …)

  • Onboard A7585D SiPM power supply for sensors biasing

A5202 - DT5202

The A5202 (DT5202 is the boxed version for desktop use) is the FERS-5200 unit that uses the Citiroc‐1A chip produced by WeeROC for SiPM readout. More precisely, the A5202 is a small board (∼7 ×17 cm2) housing two Citiroc‐1A chips (64 readout channels). Each readout channel is composed of a Preamplifier, a Slow Shaper with peak sensing detector and a Fast Shaper followed by a discriminator. Peak sensing values from each Citiroc‐1A are converted sequentially (multiplexed output) by an ADC. The 64 channel self‐triggers (discriminator outputs) can be used for counting, time stamping, to determine the Time over Threshold (ToT) information and also to generate the board bunch trigger that starts the A/D conversion. The A5202 board is also provided with the A7585D power supply module for biasing the SiPMs.

A5203 - DT5203

The A5203 (DT5203 is the boxed version for desktop use) is the FERS-5200 unit that uses the picoTDC chip produced by CERN for high-resolution time measurements. More precisely, the A5203 is a small board (∼7 ×17 cm2)  operating as a 64 channels TDC with 3,125 ps LSB resolution. Each readout channel can accept LVDS signals and measure their rising/falling edge timestamps. In this way, the unit is able to reconstruct Time of Arrival of signals as an absolute timestamp or as a ΔT with respect to a common Tref pulse, as well as the Time over Threshold that allows for amplitude estimation or walk correction.

The ToT allows for amplitude estimation, energy spectrum reconstruction, and timing walk correction, and it also enables the possibility to achieve optimal timing resolution with no need of Constant Fraction Discriminators. For small setups a single A5203 unit can be used stand alone, without any additional hardware, by simply connecting the unit to a PC via USB 2.0 or Ethernet 10/100T. For large readout systems, a flexible and scalable network of units can be created by means of the high speed optical link called TDlink.

A5204 - DT5204

The A5204 (DT5204 is the boxed version for desktop use) is the FERS-5200 unit that houses the WeeROC Radioroc 2 and CERN picoTDC chips for SiPM readout with high-resolution time in just ∼7 ×20 cm2. Besides a slow shaper with a pulse height detector for the data acquisition, the Radioroc 2 ASIC includes configurable fast pre-amplifiers followed by fast shapers and discriminators that can output 64 individual channel triggers with jitter as low as 55 ps FWHM on a single p.e. The individual channel triggers are connected to the FPGA, for photo-counting up to 200 MHz as well as for the implementation of coincidences, majority and topological acquisition triggers. The individual triggers are also connected to the picoTDCchip, thet allows for very precise timing measurements thanks to the 3.125 ps LSB. Time Over Threshold (ToT) can also be used to estimate the pulse height, making it possible to acquire time stamp and PHA with very low dead time and extremely high rate, without the need of the multiplexed A/D conversion.

 The A5204/DT5204 board is also provided with the A7585D power supply module for biasing the SiPMs.

A5205-DT5205

The A5205 (DT5205 is the boxed version for desktop use) is a FERS-5200 unit designed for the readout of detectors such as PIN diodes, silicon strips and GEMs. It integrates a Psiroc-based front-end with charge sensitive preamplifiers, dual gain shaping and fast discriminators, coupled to a high-resolution picoTDC for precise timing measurements. The module operates as a 64-channel system supporting Pulse Height Analysis (PHA), multi-channel counting and high-resolution timing.

The A5205 features flexible acquisition modes, including spectroscopy for energy measurements, counting mode for rate monitoring, and trigger-less timing mode for Time of Arrival (ToA) and Time over Threshold (ToT). The ToT information enables charge estimation with high linearity and reduced dead time.

The unit can be used stand-alone via USB 2.0 or Ethernet, or integrated into scalable systems through the high-speed optical TDlink for synchronized multi-board readout.

DT5216

One DT5216 (FERS Concentrator Board) manages a single TDlink and acts as a data concentrator for up to 8 FERS units connected in a daisy chain. With 128-channel cards, this configuration allows a total of 1024 readout channels to be handled by a single Concentrator. The Data Concentrator connects to the host computer via a USB 3.0 Type-C interface.

The Concentrator Board handles data acquisition from the FERS unit network and performs event building based on the time stamp and/or trigger ID of the event fragments collected by each unit. The sorted and merged data packets are temporarily stored in local memory before being transferred to the host computer.

DT5215

One DT5215 (FERS Data Concentrator) can manage up to 8 TDlinks. Each TDLink can connect and manage up to 16 FERS units in daisy chain. In the case of the A5202 (CITIROC 1A), it makes 8192 channels read out by a single Concentrator. Multiple concentrator boards can be synchronized to further extend the total number of channels. The Data Concentrator is connected to the Host computer through 1/10 Gb Ethernet or USB 3.0.

A Linux-based Single Board Computer is embedded in the Concentrator board. It manages the data readout from the network of FERS units and the event data building according to the time stamp and/or trigger ID of the event fragments acquired by each unit. Sorted and merged data packets are then stored to the local memory and finally sent to the host computers through a fast 10 GbE or USB 3.0 link.  

One computer, one Concentrator, thousands of channels

FERS-5200 is a scalable and extendable readout system: a single FERS unit can be operated as a stand-alone module for prototyping and validation, and later integrated into a larger daisy-chain network to read out thousands of detector channels. This approach minimizes waste and maximizes cost efficiency.

At the core of this scalability is the optical TDlink, which simultaneously handles data transmission, unit synchronization, and slow control.

Each DT5215 Concentrator Board provides 8 optical links, and every link can host up to 16 FERS front-end units (A520x series) in daisy chain.

  • For the A5202/A5203 modules (64 channels each), a single Concentrator can manage up to 8192 channels.

  • Using the A5203B version, the number of channels is doubled.

Multiple DT5215 boards can be synchronized, allowing the system to scale up to virtually unlimited channel counts!

Janus software

Janus is open-source software based on the FERSlib library for controlling and reading FERS-5200 boards. It comes in different versions, Ver. 5202, Ver. 5203, and Ver. 5204, and serves as a platform for custom DAQ development tailored to specific needs. Users can customize data processing, acquired statistics, and output file formats.

Janus can handle multiple connected FERS units via Ethernet or USB, including readout of the DT5215 and DT5216 Concentrator Boards, offering a unified user interface. Janus is composed of two parts: one in C, the core application, and one in Python for the user interface. Plots are generated using Gnuplot, and all configuration parameters are stored in a text-based config file.