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3 programmable ranges: 100 ps LSB (19 bit resolution), 200 ps LSB (19 bit) and 800 ps LSB (17 bit)
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ECL/LVDS inputs automatically detected
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5 ns Double Hit Resolution
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Leading and Trailing Edge detection
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Trigger Matching and Continuous Storage acquisition modes
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32 k x 32 bit output buffer
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MBLT, CBLT and 2eSST data transfer
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Multicast commands
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Geographical address supported
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Live insertion
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Libraries, Demos (C and LabView) and Software tools for Windows and Linux
The CAEN Mod. VX1190A-2eSST is a 128 channel Multihit TDC, housed in a 1-unit wide VME64X 6U module. The unit features High Performance Time to Digital Converter chips developed by CERN. LSB can be set at 100 ps (19 bit resolution, 52 µs FSR), 200 ps (19 bit, 104 µs FSR) or 800 ps (17 bit, 104 µs FSR).
The channels can be enabled for the detection of hits rising/falling edges or for their width measurement (both the edges’ timing, and the hit width can be measured with the selected resolution). For each channel there is a digital adjustment for the zero-ing of any offsets. The data acquisition can be programmed in “Events” (“Trigger Matching Mode”, with a programmable time window) or in “Continuous Storage Mode”. Both ECL and LVDS input signals are supported. The module programming is performed via a microcontroller that implements a high-level user friendly interface. The VME interface allows the module to work in A24 and A32 addressing modes.
The board houses a 32 k x 32 bit deep Output Buffer that can be readout via VME in a completely independent way from the acquisition itself.
The device supports MBLT, CBLT and 2eSST readout modes. Live insertion is also supported.
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Compare
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Image
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Name
|
Package
|
No. of Channels
|
Resolution (bit)
|
Type
|
Conversion Time (µs)
|
LSB (ps)
|
Full Scale Range (µs)
|
Input Type
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Connectors
|
|
|
VX1190A-2ESST |
VME64X |
128 |
19 / 17 |
Multihit Digital TDC |
- |
100 / 200 / 800 |
52 / 104 |
ECL / LVDS |
Robinson Nugent Flat |
|
|
DT5203 |
Desktop |
64 |
26 |
Multihit Digital TDC |
- |
3.125 |
52 |
LVDS |
1 edge connector type HSEC8-170 |
|
|
V1290A-2ESST |
VME |
32 |
21 |
Multihit Digital TDC |
- |
25 |
52 |
ECL / LVDS |
Std. Flat |
|
|
V1290N-2ESST |
VME |
16 |
21 |
Multihit Digital TDC |
- |
25 |
52 |
NIM |
LEMO |
|
|
V775N |
VME |
16 |
12 |
Analog TDC |
2.8 |
35 / 300 |
0.14 / 1.2 |
NIM |
LEMO |
|
|
A5203 |
Desktop |
64/128 |
26 |
Multihit Digital TDC |
- |
3.125 |
52 |
LVDS |
1 edge connector type HSEC8-170 |
|
|
V775 |
VME |
32 |
12 |
Analog TDC |
5.7 |
35 / 300 |
0.14 / 1.2 |
ECL |
Std. Flat |
|
|
V1190A-2ESST |
VME |
128 |
19 / 17 |
Multihit Digital TDC |
- |
100 / 200 / 800 |
52 / 104 |
ECL / LVDS |
Robinson Nugent Flat |
Technical Specifications
|
Packaging |
6U-high, 1-unit wide, VMEx64X unit |
|
Inputs |
128 ECL/LVDS inputs, 110 Ω impedance |
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Acquisition modes |
Trigger Matching Mode, Continuous Storage Mode |
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Double hit resolution |
5 ns |
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Built-in memory |
32 kwords deep Output Buffer |
|
LSB |
VME programmable: 100 / 200 / 800 ps |
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Dynamic Range |
104 μs (200 ps and 800 ps LSB); 52 μs (100 ps LSB) |
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RMS resolution (with compensation enabled) |
|
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Integral non linearity (with compensation enabled) |
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Max. differential non linearity (with compensation disabled) |
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Interchannel Isolation |
≤0.7 LSB |
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Offset spread |
<2 ns |
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EXT TRIGGER input |
Two LEMO 00 bridged connectors, NIM signal, 50 Ohm |
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Double Trigger resolution |
75 ns |
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Clock source |
Internal (40 MHz) or External (on Control connector), dip switch selectable |
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Control inputs |
Active-high, differential ECL input signals:
rising-edge active, differential ECL input signals:
|
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Control outputs |
differential ECL output signal: OUT_PROG: control output signal, programmable via the out prog control register |
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Displays |
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|
VME |
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