-
4 identical independent sections
-
Two inputs per section
-
130 MHz Max input frequency
-
6 ns double pulse resolution
-
10 ns I/O delay
-
Switch selectable AND/OR logical function
-
Adjustable output FWHM (4 to 650 ns)
-
Overlap output
-
Common Veto
The Mod. N455 houses, in a single width NIM module, 4 independent sections performing the logic function, AND or OR, selected via the relevant front panel switch. Each section has 3 normal and 1 complementary NIM shaped outputs whose width can be set via front panel trimmer and a supplementary overlap output (OVP OUT) whose width is equal to the time interval during which the desired function is satisfied. The OVP OUT allows to obtain an output signal with the minimum input/output delay. A common veto input signal is available to disable all the output signals. (ISN-GRENOBLE design)
You also may be interested in…
NIM8301
NIM8302
NIM8305
NV8020A
NIM8302P
NIM8303
NIM8306
NIM8304
Request a Quote
Compare
|
Image
|
Name
|
Package
|
Function
|
Inputs per Section
|
Outputs per Section
|
I/O Delay (ns)
|
Input Bandwidth (MHz)
|
Majority
|
Strobe/ Veto
|
Connectors
|
No. of Sections
|
|
|
N405 |
NIM |
Logic Unit |
4 NIM |
2+/1 NIM, NIM Linear |
< 14 |
100 |
Yes |
yes |
LEMO |
3 |
|
|
New DT1081B |
Desktop |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
Coming Soon DT1082 |
Desktop |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
DT5495 |
Desktop |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 |
|
|
Coming Soon N1082 |
NIM |
Open FPGA |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
N455 |
NIM |
OR / AND |
2 NIM |
3+/1 NIM, 1 NIM Overlap |
< 16 |
130 |
No |
Yes |
LEMO |
4 |
|
|
V976 |
VME |
Logic Unit |
4 NIM/TTL |
4 NIM/TTL |
< 9 |
150 |
Yes |
No |
LEMO |
4 |
|
|
N1081B |
NIM |
Programmable Logic Unit |
6 NIM/TTL |
4 NIM/TTL |
20 |
n.a. |
Yes |
Yes |
LEMO |
4 |
|
|
V2495 |
VME |
Programmable Trigger Unit FPGA: Cyclone V 5CGXC4 (50 K LEs) |
64 ECL/ PECL/ LVDS+2 bidirectional NIM/TTL (expandable up to 162) |
32 LVDS+2 bidirectional NIM/TTL (expandable up to 130) |
n/a |
Section A/B: 200, Section C/D: 250 |
Yes |
Yes |
Robinson Nugent Flat/LEMO |
1 |
|
|
N113 |
NIM |
OR |
12 NIM |
2 NIM |
< 10 |
130 |
No |
Yes |
LEMO |
2 |
Technical Specifications
|
Packaging |
One unit wide NIM module |
|
IN |
2, std. NIM level, 50 Ohm impedance for each section |
|
VETO |
1, std. NIM level, 50 Ohm impedance. It must precede the leading edge of the coincidence signal by at least 1 ns. |
|
OUT |
3, std. NIM level, 50 Ohm impedance (for each section). |
|
OUT |
1, std. NIM level, complementary logic, 50 Ohm impedance (for each section). |
|
OVP |
1, std. NIM level, 50 Ohm impedance (for each section) |
|
Max. frequency |
130 MHz |
|
Input-Output delay |
< 16 ns |
|
Input-OVP delay |
< 10 ns |
|
Double Pulse resolution |
< 6 ns at min. output width setting |
Footer
